COMPUTER ORGANIZATION AND ARCHITECTURE (COA), B.E. Computer Science (CS), Semester 4, December 2009.

COMPUTER ORGANIZATION AND ARCHITECTURE (COA),

B.E. Computer Science (CS), Semester 4, December 2009.

Con.5702-09

SP-7362

(3 Hours)

[Total Mark: 100]

N. B.: (1) Question no 1 is compulsory.

(2) Solve any four questions out of remaining.

(3) Draw neat labelled diagram wherever necessary.

1. (a) Explain Vonnewmann model in detail. --- (5 Marks)

(b) Define the following terms microinstruction, micro operation, micro program. --- (5 Marks)

(c) Explain with suitable example Booth’s Algorithm for signed Multiplication. --- (10 Marks)

2. (a) Explain in detail characteristic of RISC and CISC. --- (10 Marks)

(b) Explain restoring division method, Hence perform 17/3. --- (10 Marks)

3. (a) What is the difference between pipelining and parallelism? Explain the Flynn’s Classification in detail.--- (10 Marks)

(b) Explain in brief about SPARC processor. Draw and explain in brief n – bit windows architecture of SPARC processor. --- (10 Marks)

4. (a) How many 128 bytes RAM chips are required to provide a memory of 2048 bytes? Show details of connection, clearly indicating address, data and decoder configuration.--- (10 Marks)

(b) Explain the different RAID levels. --- (10 Marks)

5. (a) Explain page replacement algorithm. Find out page fault for following string using LRU method. --- (10 Marks)

6   0   12   0   30   4   2   30   32   1   20   15

(Consider page frame size = 3)

(b) Explain the interleaved memory in detail. --- (10 Marks)

6. (a) What is Cache coherence ? Explain Cache coherence strategies in single processor and multiprocessor systems. --- (10 Marks)

(b) Write short notes on any two: - --- (10 Marks)

(i) DMA

(ii) Programmed I/O

(iii) Interrupt Driven I/O

7. (a) Explain systolic processor with suitable example.---- (10 Marks)

(b) What is pipelining? Explain six stage CPU instruction pipeline. --- (10 Marks)