ADVANCED MICROPROCESSOR (AMP) May 2010 COMPUTER SCIENCE SEMESTER 6
Con.3500-10. (REVISED COURSE) AN-4477(3 Hours) [Total Marks:-100]
N.B. (1) Question No.1 is compulsory.
(2) Attempt any four questions out of remaining six questions.
1. (a) Draw the block diagram of the 80386 DX processor and explain each block in brief. [10 Marks]
(b) Differentiate segmentation in real mode and in protected mode. [5 Marks]
(c) Explain how the flusing of pipeline problem in minimized in pentium architecture. [5 Marks]
2. (a) Enlist the instruction pairing rules for U and V pipeline in pentium. [5 Marks]
(b) List the steps of Instruction Issue Algorithm " in pentium. [5 Marks]
(c) Draw and explain pentium processor architecture. Highlight architectural features. [10 Marks]
3. (a) Explain dynamic branch prediction logic of pentium processor. [10 Marks]
(b) Differentiate between pentium and pentium pro-processor w.r.t generation, overclocking
feature, core pipelines stages, no. of transistors, address bits main memory size, L2 cache,
SMP support. [10 Marks]
4. (a) Compare super SPARC and ultra SPARC processors. Draw the architecture of super SPARC
and explain. [10 Marks]
(b) Draw and explain various instruction formats of SPARC processor. [10 Marks]
5. (a) Explain cache organisation of pentium. [10 Marks]
(b) State the features of PCI bus. Draw a work station based on PCI bus and explain. [10 Marks]
6. (a) List the features of each ISA bus version namely 8 bit, 16 bit and 32 bit EISA. [10 Marks]
(b) Explain floating point pipeline stages of pentium processor in brief. [10 Marks]
7. Write short notes on the following:- [20 Marks]
(a) Layered architecture of SCSI.
(b) USB
(c) Data types supported by SPARC
(d) Standard and burst bus cycles of pentium.
No comments:
Post a Comment