Monday, June 23, 2014

ADVANCED MICROPROCESSOR (AMP) DECEMBER 2010 COMPUTER SCIENCE SEMESTER 6

ADVANCED MICROPROCESSOR (AMP) DECEMBER 2010 COMPUTER SCIENCE SEMESTER 6

Con.5550-10                                        (REVISED COURSE)                        GT-7554

                                                                     (3 Hours)                              [Total Marks :-100]

N.B: (1) Question No.1 is compulsory.
        (2) Attempt any four questions out of remaining six questions.
        (3) Each question have 20 marks.

1. (a) Explain Intel's Net Burst Micro-architecture with neat schematic. [10 Marks]
    (b) Explain the protection mechanism of X86 intel family microprocessor. [10 Marks]
    (c) Explain how the Linear Pipelining Working. [10 Marks]

2. (a) Differentiate between real mode and protected mode of X86 family. [10 Marks]
    (b) State and explain operating mode of X86 family of processor. Show the mode transition
          diagram highlighting important features. [10 Marks] 
    (c) Explain segment translation mechanism of X86 processor with flow chart. Also explain
         segment descriptor field. [10 Marks]

3. (a) Explain different stages of integer pipeline and floating point pipeline of Pentium
         Processor. [10 Marks]
    (b) Explain Cache organisation of pentium. [10 Marks]
    (c) Explain with block diagram how super scalar operation is carried but in pentium
         processor. [10 Marks]

4. (a) Write the features of pentium IV processor. [10 Marks]
    (b) Explain Itanium processor with respect to instruction format, core pipeline stages and the
         functionality. [10 Marks]
    (c) Explain the architecture of super SPARC microprocessor with the help of neat
         diagram. [10 Marks]

5. (a) Data type supported by SPARC. [5 Marks]
    (b) Register file of SPARC architecture. [5 Marks]
    (c) Write short note on Ultra SPARC Processor. [5 Marks]
    (d) Branch Prediction Logic. [5 Marks]

6. (a) Explain EFAG bits of pentium. [10 Marks]
    (b) Explain the state transition diagram for pentium processor bus cycle. [10 Marks]
    (c) Differentiated RISC and CISC. [10 Marks]

7. Write short notes on the following : -
     (a) IDE [5 Marks]
     (b) VESA [5 Marks]
     (c) EISA [5 Marks]
     (d) USB [5 Marks]

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