COMPUTER ORGANIZATION AND ARCHITECTURE (COA), B.E. Computer Science (CS), Semester 4, December 2010.

COMPUTER ORGANIZATION AND ARCHITECTURE (COA),

B.E. Computer Science (CS), Semester 4, December 2010.

Con.5577-10

GT-6237

(3 Hours)

[Total Mark: 100]

N. B.: (1) Question no 1 is compulsory.

(2) Attempt any four questions out of remaining.

1. (a) Main memory has 3 pages and the processor requires pages from virtual memory in the following order.
23 2 1 5 2 4 5 3 25 2 Show the implementation of FIFO, LRU, LFU.--- (10 Marks)

(b) Explain SPARC Processor in detail. Draw and explain n bit windows architecture of SPARC processor. --- (10 Marks)

2. (a)Explain systolic processor with suitable examples. --- (10 Marks)

(b) What is cache memory? Explain cache coherence strategies in single and multiprocessor systems. --- (10 Marks)

3. (a) Compare and Contrast DMA, Programmed I/O. & interrupt driven I/O. – (10 Marks)

(b) What is RAID? Explain different RAID levels in detail. --- (10 Marks)

4. (a) Explain different bus arbitration schemes with suitable diagrams. --- (10 Marks)

(b) What is pipelining? Explain six stage instruction pipeline with suitable diagram. --- (10 Marks)

5. (a) Explain with suitable example booth’s algorithm. --- (10 Marks)

(b) Explain microinstructions, micro operations, micro- program in detail. --- (10 Marks)

6. (a) Explain RISC and CISC architectures in detail. --- (10 Marks)

(b) Explain Flynn’s classifications with suitable diagrams. Also comment on design issues of pipeline architecture. --- (10 Marks)

7. Write short notes on any Four: --- (20 marks)

1. PCI Bus
2. Memory Characteristics
3. Micro Instruction Sequencing and Execution
4. Loop Buffer
5. Interleaved Memory.