DIGITAL LOGIC DESIGN AND ANALYSIS (DLDA) DECEMBER 2011 COMPUTER SCIENCE SEMESTER 3

DIGITAL LOGIC DESIGN AND ANALYSIS (DLDA) DECEMBER 2011 COMPUTER SCIENCE SEMESTER 3

Con.6565-11.                                                                                                           MP-4105

                                                       (3 Hours)                                               [Total Marks: 100]


N.B.: (1) Question No.1 is compulsory.
         (2) Attempt any four questions out of remaining six questions.

1. (a) Convert (650.17)8 into decimal, binary and hex. [6 Marks]
    (b) Explain ALU with the help of block diagram. [6 Marks]
    (c) State and explain distributive and associative law for boolean equation. [4 Marks]
    (d) Determine the truth table for the circuit given below:-[4 Marks]
               

2. (a) Design 16:1 MUX using 4:1 MUX. [10 Marks]
    (b) Simplify using K-map obtain SOP equation and realise only by using NAND
         gates. [10 Marks]
                  f(A,B,C,D) = πm(1,2,3,8,9,10,11,14) + d(7,15)

3. (a) Using Quine McCluskey method, determine the minimal SOP form for:- [10 Marks]
          F(A,B,C,D,E,F,G) = εm(20,28,38,39,52,60,102,103,107)
    (b) Design a BCD adder using 4 bit binary adders and explain. [10 Marks]

4. (a) What is shift register? Explain 4 bit bidirectional shift register. [10 Marks]
    (b) Design a MOD-6 synchronous up-counter and explain its operation. [10 Marks]

5. (a) Implement the following expression using 8:1 MUX. [10 Marks]
         f(A,B,C,D) = εm(0,1,3,6,9,11,12,13,15)
    (b) Explain with a neat diagram 2 input TTL NAND gate in detail. [10 Marks]

6. (a) Covert T flip flop to D flip flop. [10 Marks]
    (b) Compare the different logic families with respect to the following parameters: [10 Marks]
          Fan in, Fan out, Noise margin, speed and power dissipation.

7. Write short notes on:- [20 Marks]
     (a) Decade Counters
     (b) Demorgan's Theorems
     (c) Race around condition