COMPUTER ORGANIZATION AND ARCHITECTURE (COA),
B.E. Computer Science (CS), Semester 4, May 2012.
Con.4795-12
GN-9323
(3 Hours)
[Total Mark: 100]
N. B.: (1) Question no 1 is compulsory.
(2) Attempt any four questions out of remaining six questions.
(3) Assume suitable data wherever necessary.
1. (a) Consider a cache (M1) and memory (M2) hierarchy with the following characteristics: --- (10 marks)
M 1 : 16K words, 50 ns access time
M 2 : 1 M words, 400 ns access time
Assume 8 words cache block and set size of 256 words with set associative mapping.
- Show the mapping between M 1 and M 2.
- Calculate the effective access time with a cache hit ratio of h = 0.95
2. (a) Multiply (-7) with (3) by using Booth’s multiplication. Give the flow table of multiplication. --- (10 Marks)
(b) What is micro operation? Give suitable examples of some four types of micro operations.--- (10 Marks)
3. (a) What do you mean by initialization of DMA controller? How DMA controller works? Explain with suitable block diagram. --- (10 Marks)
(b) What is virtual memory? Explain how virtual address is mapped to actual physical address. --- (10 Marks)
4. (a) Explain with an example, how effective address is calculated in different types of addressing modes. --- (10 Marks)
(b) Formulate a four segment instruction pipeline for a computer. Specify the operation to be performed in each segment. --- (10 Marks)
5. (a) Explain any two methods of hardwired control unit. --- (10 Marks)
(b) Explain the von newmann architecture with the help of diagram. --- (10 Marks)
6. (a) With neat flow chart, explain the procedure for division of floating point numbers carried out in a computer. --- (10 Marks)
(b) Explain the Flynn’s classification of parallel processing. --- (10 Marks)
7. Write short notes on any four: --- (20 Marks)
(a) PCI Bus architecture
(b) Systolic arrays
(c) Comparison of RISC and CISC
(d) IEEE 754 format
(e) Programmed I/O.
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