DIGITAL LOGIC DESIGN AND ANALYSIS (DLDA) MAY 2010 COMPUTER SCIENCE SEMESTER 3

DIGITAL LOGIC DESIGN AND ANALYSIS (DLDA) MAY 2010  COMPUTER SCIENCE SEMESTER 3

Con.3016-10                                                                                                AN-2500
                                                          (3 Hours)                                  [Total Marks : 100]

N.B : (1) Question No. 1 is compulsory.
         (2) Attempt any four questions out of remaining six questions.
         (3) Assume suitable data and it clearly.

1. (a)	Convert (1473.45)10 to Octal, Binary and Hexadecimal.	(6)
(b)	Perform directly without converting to any other base.	(8)
	(i) (BC5)H-(A2BD)H (ii) 12.3)4+(212. 3)4
	(iii) (77)8*(17)8 (iv) (11110)2÷(110)2
(b)	Write the hamming code for 1010.	(3)
(c)	State and prove De Morgan's Theorem.	(3)
2. (a)	Using the K-map method minimization technique simplify and draw	(10)
	the circuit for the following function.
	F(A,B,C,D,E)=£m(0,1,2,3,5,7,8,9,11,14,16,17,18,19)+d(24,25)
(b)	Design 3 bit Binary to gray code converter	(5)
(c)	What is essential prime implicant in Quine McClusky Method.	(2)
(d)	Prove OR-AND configuration is equivalent to a NOR-NOR configuration.	(3)
3. (a)	What is Canonical SOP and POS form? Explain with an example.	(5)
(b)	Implement the following using only one 8:1 MUX and few gate.	(5)
	F(A,B,C,D)=£m(0,3,5,7,9,13,15)
(c)	Design and draw a combinational circuit that multiplies two 2 bit numbers	(10)
	A1A2 and B1B2 to produce 4-bit product C3C2C1C0.
4. (a)	Design a sequence generator using T flip-flop for the given sequence. Check	(10)
	for lock-out conditions.
	0-> 2 -> 4 -> 5 -> 0
(b)	Implements the following boolean function using 4:1 MUX	(10)
	F(A,B,C,D)=£m(0,1,2,4,6,9,12,14).
5. (a)	Convert SR flip-flop to Dand T flip-flop and draw the circuit.	(10)
(b)	Calculate the characteristics equation using characteristic table of SR, JK, D and T	(10)
	Flip-flop.
6. (a)	Design a synchronous counter for the following sequence using JK FF Draw the	(10)
	timing diagram.
	1-> 0 -> 3-> 2-> 5-> 4
(b)	Using the quine McClusky method simplify	(10)
	F=£m(1,3,7,9,11,13,15)+D(2,4)
7. (a)	Air India Complex has four elevators for visitors. To save on power only two elevators	(10)
	cars are available.If the traffic is heavy or if car 1 is shutdown due to technical problem,
	the third elevators car is switched ON. The fourth elevators car is a standby car which
	is powered ON if both car1 and car2 fail.Design a logic circuit for starting power to
	car3 and car4.
(b)	Compare TTL, CMOS and ECL families with respect to gate, voltage level, fan-in,	(10)
	fan-out, propagation delay, power dissipation and noise margin.