DIGITAL LOGIC DESIGN AND ANALYSIS (DLDA) DECEMBER 2010 COMPUTER SCIENCE SEMESTER 3

DIGITAL LOGIC DESIGN AND ANALYSIS (DLDA) DECEMBER 2010 COMPUTER SCIENCE SEMESTER 3

Con.5680-10                                                                                                 GT-6240

                                                                  (3 Hours)                               [Total Marks : -100]


N.B.: (1) Question No.1 is compulsory.
         (2) Attempt any four questions out of remaining six questions.
         (3) Assume suitable data and it clearly.

1. (a) Convert (1234.56)10 to octal, Hexadecimal. [4 Marks]
    (b) Perform following operation without converting to any other base. [4 Marks]
            (i) (ABC)H - (FEDC)H
            (ii) (234.12)5 + (432.34)5
            (iii) (76)8 * (67)8
             (iv) (10101011)2 / (101)2
    (c) Represent (29)10 into Excess -3 code and gray code. [4 Marks]
    (d) Design (1:16) Demultiplexer using (1:4). [4 Marks]

2. (a)    i. Subtract using 1's and 2's complement method (73)10 - (49)10. [2 Marks]
            ii. Perform BCD addition for number 56 and 65. [2 Marks]
           iii. Perform (11010)2 / (101)2. [2 Marks]
           iv. Write hamming code for number 0111. [2 Marks]
    (b) Simplify using Boolean Theorems and draw logic diagram for the following:-
          i.
         ii.
        iii.

3. (a) Minimize the following logic function and realize using NAND gates:- [10 Marks]
          f(A,B,C,D) = m(1,3,5,8,9,11,15) + d(2,13)
    (b) Simplify using Quine McClusky method. Realize the equation using any universal
          gate. [10 Marks]
          F(A,B,C,D) = m(0,2,3,6,7,8,9,12,13)

4. (a) Deign a MOD-6 synchronous up counter and explain its working. [10 Marks]
    (b) What is shift register? Explain 4-bit bi-directional shift register. [10 Marks]

5. (a) Implement the following Boolean function using 4:1 MUX. [10 Marks]
          F(A,B,C,D) = m(1,2,4,6,9,12,14)
    (b) Convert SR flip flop to D and T flip flop and draw the circuit. [10 Marks]

6. (a) Draw 2-input TTL NAND gate and explain its operation. [10 Marks]
    (b) Prove that NAND and NOR gate as universal gate. [10 Marks]

7. (a) Write notes on following :- [20 Marks]
          (a) ALU
          (b) PLA and PAL
          (c) Multiplexer and demultiplexer
          (d) Race around condition in JK flip flop